| 1 | assigments/assigment1/ps1_solutions_small.pdf | pdf | 1.69 MiB |
| 0 | assigments/assigment1/ps1.pdf | pdf | 126.12 KiB |
| 2 | assigments/assigment1/ps1a.pdf | pdf | 798.11 KiB |
| 4 | assigments/assigment2/ps2_solutions_small.pdf | pdf | 788.25 KiB |
| 3 | assigments/assigment2/ps2.pdf | pdf | 137.01 KiB |
| 6 | assigments/assigment3/ps3_solutions.pdf | pdf | 130.71 KiB |
| 5 | assigments/assigment3/ps3.pdf | pdf | 174.41 KiB |
| 8 | assigments/assigment4/ps4_solutions_small.pdf | pdf | 358.08 KiB |
| 7 | assigments/assigment4/ps4.pdf | pdf | 163.25 KiB |
| 9 | assigments/assigment4/ps4a.pdf | pdf | 250.13 KiB |
| 11 | assigments/assigment5/ps5_solutions.pdf | pdf | 867.75 KiB |
| 10 | assigments/assigment5/ps5.pdf | pdf | 175.04 KiB |
| 12 | assigments/assigment5/ps5a.pdf | pdf | 551.51 KiB |
| 13 | lectures/01-introduction/computer architecture 0.0 l00-s1course introduction.mp4 | mp4 | 99.41 MiB |
| 14 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.0 l1s1 course overview (434).mp4 | mp4 | 18.16 MiB |
| 15 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.1 l1s2 motivation (1640).mp4 | mp4 | 95.04 MiB |
| 16 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.2 l1s3 course content (910).mp4 | mp4 | 25.75 MiB |
| 17 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.3 l1s4 architecture and microarchitecture (2337).mp4 | mp4 | 52.83 MiB |
| 18 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.4 l1s5 machine models (1602).mp4 | mp4 | 32.83 MiB |
| 19 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.5 l1s6 isa characteristics (2547).mp4 | mp4 | 58.02 MiB |
| 20 | lectures/02-instruction-set-architecture-microcode/computer architecture 1.6 l1s7 recap (0117).mp4 | mp4 | 1.92 MiB |
| 21 | lectures/03-pipelining-review/computer architecture 2.0 l2s1 microcoded microarchitecture (1408).mp4 | mp4 | 81.87 MiB |
| 22 | lectures/03-pipelining-review/computer architecture 2.1 l2s2 pipeline basics (3051).mp4 | mp4 | 64.69 MiB |
| 23 | lectures/03-pipelining-review/computer architecture 2.2 l2s3 structural hazard (1013).mp4 | mp4 | 23.16 MiB |
| 24 | lectures/03-pipelining-review/computer architecture 2.3 l2s4 data hazards (4633).mp4 | mp4 | 92.93 MiB |
| 25 | lectures/04-cache-review/computer architecture 3.0 l3s1 control hazards jumps (1556).mp4 | mp4 | 26.94 MiB |
| 26 | lectures/04-cache-review/computer architecture 3.1 l3s2 control hazards branch (2402).mp4 | mp4 | 47.51 MiB |
| 27 | lectures/04-cache-review/computer architecture 3.2 l3s3 control hazards others(751).mp4 | mp4 | 15.59 MiB |
| 28 | lectures/04-cache-review/computer architecture 3.3 l3s4 memory technologies (2247).mp4 | mp4 | 50.50 MiB |
| 29 | lectures/04-cache-review/computer architecture 3.4 l3s5 motivation for caches (2225).mp4 | mp4 | 127.36 MiB |
| 30 | lectures/05-superscalar1/computer architecture 4.0 l4s1 classifying caches (2807).mp4 | mp4 | 159.71 MiB |
| 31 | lectures/05-superscalar1/computer architecture 4.1 l4s2 cache performance (1711).mp4 | mp4 | 31.28 MiB |
| 32 | lectures/05-superscalar1/computer architecture 4.2 l4s3 superscalar 1 (642).mp4 | mp4 | 13.47 MiB |
| 33 | lectures/05-superscalar1/computer architecture 4.3 l4s4 basic two-way in-order superscalar (456).mp4 | mp4 | 9.48 MiB |
| 34 | lectures/05-superscalar1/computer architecture 4.4 l4s5 fetch logic and alignment (1101).mp4 | mp4 | 19.12 MiB |
| 35 | lectures/06-superscalar3-and-exceptions/computer architecture 5.0 l5s1 baseline superscalar and alignment (416).mp4 | mp4 | 8.49 MiB |
| 36 | lectures/06-superscalar3-and-exceptions/computer architecture 5.1 l5s2 interrupts and bypassing (1213).mp4 | mp4 | 23.66 MiB |
| 37 | lectures/06-superscalar3-and-exceptions/computer architecture 5.2 l5s3 interrupts and exceptions (2925).mp4 | mp4 | 57.23 MiB |
| 38 | lectures/06-superscalar3-and-exceptions/computer architecture 5.3 l5s4 introduction to out-of-order processors (3053).mp4 | mp4 | 61.92 MiB |
| 39 | lectures/07-superscalar3/computer architecture 6.0 l6s1 review of out-of-order processors (326).mp4 | mp4 | 6.86 MiB |
| 40 | lectures/07-superscalar3/computer architecture 6.1 l6s2 i2o2 processors (1958).mp4 | mp4 | 38.79 MiB |
| 41 | lectures/07-superscalar3/computer architecture 6.2 l6s3 i2o1 processors (2844).mp4 | mp4 | 161.88 MiB |
| 42 | lectures/07-superscalar3/computer architecture 6.3 l6s4 io3 processors (1623).mp4 | mp4 | 32.01 MiB |
| 43 | lectures/07-superscalar3/computer architecture 6.4 l6s5 io2i processors (431).mp4 | mp4 | 8.07 MiB |
| 44 | lectures/08-superscalar4/computer architecture 7.0 l7s1 speculation and branch (1437).mp4 | mp4 | 29.08 MiB |
| 45 | lectures/08-superscalar4/computer architecture 7.1 l7s2 register renaming introduction (1108).mp4 | mp4 | 63.30 MiB |
| 46 | lectures/08-superscalar4/computer architecture 7.2 l7s3 register renaming with pointers to iq and rob (2454).mp4 | mp4 | 141.77 MiB |
| 47 | lectures/08-superscalar4/computer architecture 7.3 l7s4 register renaming with values in iq and rob (1214).mp4 | mp4 | 67.58 MiB |
| 48 | lectures/08-superscalar4/computer architecture 7.4 l7s5 memory disambiguation (949).mp4 | mp4 | 55.91 MiB |
| 49 | lectures/09-vliw1/computer architecture 8.0 l8s1 limits of out-of-order design complexity (1313).mp4 | mp4 | 25.64 MiB |
| 50 | lectures/09-vliw1/computer architecture 8.1 l8s2 introduction to vliw (2157).mp4 | mp4 | 42.25 MiB |
| 51 | lectures/09-vliw1/computer architecture 8.2 l8s3 vliw compiler optimizations (2120).mp4 | mp4 | 40.04 MiB |
| 52 | lectures/09-vliw1/computer architecture 8.3 l8s4 classic vliw challenges (818).mp4 | mp4 | 15.54 MiB |
| 53 | lectures/09-vliw1/computer architecture 8.4 l8s5 introduction to predication (951).mp4 | mp4 | 19.29 MiB |
| 54 | lectures/10-vliw2/computer architecture 9.0 l9s1 scheduling model review (558).mp4 | mp4 | 20.03 MiB |
| 55 | lectures/10-vliw2/computer architecture 9.1 l9s2 review of predication (3048).mp4 | mp4 | 73.24 MiB |
| 56 | lectures/10-vliw2/computer architecture 9.2 l9s3 predication implementation (1006).mp4 | mp4 | 23.85 MiB |
| 57 | lectures/10-vliw2/computer architecture 9.3 l9s4 speculation execution (2602).mp4 | mp4 | 49.14 MiB |
| 58 | lectures/10-vliw2/computer architecture 9.4 l9s5 dynamic events and clustered vliws (1042).mp4 | mp4 | 23.22 MiB |
| 59 | lectures/10-vliw2/computer architecture 9.5 l9s6 case study ia-64itanium (2110).mp4 | mp4 | 49.11 MiB |
| 60 | lectures/11-branch-prediction/computer architecture 10.0 l10s1 branch cost motivation (637).mp4 | mp4 | 12.05 MiB |
| 61 | lectures/11-branch-prediction/computer architecture 10.1 l10s2 branch prediction introduction (518).mp4 | mp4 | 9.36 MiB |
| 62 | lectures/11-branch-prediction/computer architecture 10.2 l10s3 static outcome prediction (1605).mp4 | mp4 | 29.34 MiB |
| 63 | lectures/11-branch-prediction/computer architecture 10.3 l10s4 dynamic outcome prediction (2912).mp4 | mp4 | 165.22 MiB |
| 64 | lectures/11-branch-prediction/computer architecture 10.4 l10s5 target address prediction (1845).mp4 | mp4 | 35.72 MiB |
| 65 | lectures/12-advanced-caches-1/computer architecture 11.0 l11s1 basic cache optimizations (1608).mp4 | mp4 | 34.49 MiB |
| 66 | lectures/12-advanced-caches-1/computer architecture 11.1 l11s2 cache pipelining (1416).mp4 | mp4 | 28.37 MiB |
| 67 | lectures/12-advanced-caches-1/computer architecture 11.2 l11s3 write buffers (952).mp4 | mp4 | 21.52 MiB |
| 68 | lectures/12-advanced-caches-1/computer architecture 11.3 l11s4 multilevel caches (1737).mp4 | mp4 | 52.78 MiB |
| 69 | lectures/12-advanced-caches-1/computer architecture 11.4 l11s5 victim caches (604).mp4 | mp4 | 58.50 MiB |
| 70 | lectures/12-advanced-caches-1/computer architecture 11.5 l11s6 prefetching (1234).mp4 | mp4 | 148.87 MiB |
| 71 | lectures/13-advanced-caches-2/computer architecture 12.0 l12s1 multiporting and banking (2008).mp4 | mp4 | 48.59 MiB |
| 72 | lectures/13-advanced-caches-2/computer architecture 12.1 l12s2 software memory optimizations (1653).mp4 | mp4 | 70.87 MiB |
| 73 | lectures/13-advanced-caches-2/computer architecture 12.2 l12s3 non-blocking caches (1929).mp4 | mp4 | 42.11 MiB |
| 74 | lectures/13-advanced-caches-2/computer architecture 12.3 l12s4 critical word first and early restart (306).mp4 | mp4 | 7.03 MiB |
| 75 | lectures/14-memory-protection/computer architecture 13.0 l13s1 memory management introduction (1304).mp4 | mp4 | 32.06 MiB |
| 76 | lectures/14-memory-protection/computer architecture 13.1 l13s2 base and bound registers (1144).mp4 | mp4 | 26.02 MiB |
| 77 | lectures/14-memory-protection/computer architecture 13.2 l13s3 page based memory systems (2704).mp4 | mp4 | 154.80 MiB |
| 78 | lectures/14-memory-protection/computer architecture 13.3 l13s4 translation and protection (1437).mp4 | mp4 | 33.57 MiB |
| 79 | lectures/14-memory-protection/computer architecture 13.4 l13s5 tlb processing (1200).mp4 | mp4 | 26.04 MiB |
| 80 | lectures/15-vector-processors-and-gpus/computer architecture 14.0 l14s1 address translation review (936).mp4 | mp4 | 22.70 MiB |
| 81 | lectures/15-vector-processors-and-gpus/computer architecture 14.1 l14s2 cache and memory protection interaction (2218).mp4 | mp4 | 54.93 MiB |
| 82 | lectures/15-vector-processors-and-gpus/computer architecture 14.2 l14s3 vector processor introduction (1804).mp4 | mp4 | 44.55 MiB |
| 83 | lectures/15-vector-processors-and-gpus/computer architecture 14.3 l14s4 vector parallelism (644).mp4 | mp4 | 13.84 MiB |
| 84 | lectures/15-vector-processors-and-gpus/computer architecture 14.4 l14s5 vector hardware optimizations (1852).mp4 | mp4 | 41.76 MiB |
| 85 | lectures/15-vector-processors-and-gpus/computer architecture 14.5 l14s6 vector software and compiler optimizations (554).mp4 | mp4 | 11.84 MiB |
| 86 | lectures/16-multithreading/computer architecture 15.0 l15s1 reduction scattergather and the cray 1 (920).mp4 | mp4 | 23.46 MiB |
| 87 | lectures/16-multithreading/computer architecture 15.1 l15s2 simd (658).mp4 | mp4 | 15.43 MiB |
| 88 | lectures/16-multithreading/computer architecture 15.2 l15s3 gpus (2002).mp4 | mp4 | 45.16 MiB |
| 89 | lectures/16-multithreading/computer architecture 15.3 l15s4 multithreading motivation (733).mp4 | mp4 | 16.19 MiB |
| 90 | lectures/16-multithreading/computer architecture 15.4 l15s5 course-grain multithreading (2616).mp4 | mp4 | 59.85 MiB |
| 91 | lectures/16-multithreading/computer architecture 15.5 l15s6 simultaneous multithreading (1253).mp4 | mp4 | 30.39 MiB |
| 92 | lectures/17-parallel-programming-1/computer architecture 16.0 l16s1 smt implementation (1719).mp4 | mp4 | 99.34 MiB |
| 93 | lectures/17-parallel-programming-1/computer architecture 16.1 l16s2 introduction to parallelism (1759).mp4 | mp4 | 101.56 MiB |
| 94 | lectures/17-parallel-programming-1/computer architecture 16.2 l16s3 sequential consistency (2100).mp4 | mp4 | 119.03 MiB |
| 95 | lectures/17-parallel-programming-1/computer architecture 16.3 l16s4 introduction to locks (0339).mp4 | mp4 | 21.35 MiB |
| 96 | lectures/18-parallel-programming-2/computer architecture 17.0 l17s1 sequential consistency review (348).mp4 | mp4 | 8.52 MiB |
| 97 | lectures/18-parallel-programming-2/computer architecture 17.1 l17s2 locks and semaphores (1001).mp4 | mp4 | 18.90 MiB |
| 98 | lectures/18-parallel-programming-2/computer architecture 17.2 l17s3 atomic operations (2711).mp4 | mp4 | 51.27 MiB |
| 99 | lectures/18-parallel-programming-2/computer architecture 17.3 l17s4 memory fences (1111).mp4 | mp4 | 22.67 MiB |
